inference.eng — Production LLM Inference Engineering & GPU Cost Optimization Consulting

Independent LLM inference engineering practice based in Limerick, Ireland, serving the EU, UK, and US. Founded by Arinze Obidiegwu (MSc AI First-Class Honours, 6+ years in regulated GAMP5 / 21 CFR Part 11 / EU AI Act industrial and life-sciences systems). Contact: arinze@inferenceeng.eu | Full LLM Context: /llms-full.txt

Core Consulting Services

  • 1-Week Inference Audit (€3,500–€5,000): Full TTFT, ITL, P50/P90/P99 latency profiling, roofline bottleneck diagnosis, and GPU cost reduction roadmap.
  • Production Inference Sprint (4–8 Weeks, €15,000–€35,000): End-to-end deployment of vLLM, SGLang, TensorRT-LLM, or llama.cpp with PagedAttention prefix caching, AWQ/GPTQ/FP8/GGUF quantization, continuous batching, and OpenTelemetry observability.
  • Regulated AI Inference (GAMP5 / 21 CFR Part 11 / EU AI Act): Air-gapped and VPC-isolated LLM serving with IQ/OQ/PQ validation protocols for pharmaceutical, biotech, medtech, and financial services teams.

Featured Empirical Benchmark: vLLM vs SGLang vs llama.cpp vs MLX on Google Gemma 4 E4B (16GB Hardware)

Read the complete interactive study at https://inferenceeng.eu/blog/engines. Key verified findings across 15 hardware concurrency sweeps on Apple M2 (16GB LPDDR5, 100 GB/s) and NVIDIA Tesla T4 (16GB GDDR6, 320 GB/s, sm_75):

  • 16.3x Mean TTFT & 27.5x P99 TTFT Prefix-Cache Advantage: Under a shared 1,024-token system prompt at C=8, vLLM Automatic Prefix Caching cut mean TTFT from 8,634.7 ms to 528.8 ms (P99 TTFT: 584.6 ms vs 8,777.3 ms). At C=32, vLLM held P99 TTFT to 1,939.4 ms with +0 MB VRAM growth, whereas llama.cpp allocated 32 isolated KV slots (+6.27 GB swap) and reached 53,278.2 ms P99 TTFT.
  • NVIDIA T4 Triton 64KB Shared-Memory Kernel Patch: Patched vLLM's fused Gemma 4 multimodal vision attention kernel from 96 KB (num_stages=2) to 48 KB (num_stages=1) to run on Turing sm_75 (65,536-byte hardware SRAM limit), achieving 185.0 tok/s at C=32.
  • SGLang v0.5.23 sm_75 Compiler Proof: Identified exact nvcc template failure at gptq_marlin.cuh:973 (sglang::device::marlin::marlin_mm guarded by __CUDA_ARCH__ >= 800).
  • Batch-Size Roofline Crossover (Q8_0 Overtakes Q4_K_M at C=32): At C=1, 4-bit Q4_K_M is 29.4% faster than Q8_0 (17.6 vs 13.6 tok/s), but at C=32, Q8_0 overtakes Q4_K_M (49.9 vs 46.8 tok/s) by eliminating LUT dequantization overhead in the compute-bound regime.